Bristol-based startup VyperCore is on a mission to reimagine how processors are designed, as the British firm is developing a 5nm chip and card aimed at accelerating server-class applications without requiring any changes to existing software code.
By shifting the complexity of memory allocation management from software to hardware, up to 80% of the processor cycles typically required for handling memory allocation functions can be eliminated, the company claims. This approach ensures full memory safety at the gate level within the processor, while also improving cache utilization, reducing event processing latency, and lowering overall memory heap demands.
VyperCore’s memory management architecture accelerates C and C++ by two times and Python by five times without modifying the original code, making it especially valuable for handling non-optimized code generated by AI.
From a toaster to a server
VyperCore’s co-founder, CEO, and chair, Russell Haggar, told eeNews Europe, “We are a processor company, and we are promising a 5x speed-up without changing a line of code, with memory safety in hardware. This can be inside every CPU from a toaster to a server.”
VyperCore raised £4m in funding last year and is currently in the process of securing further investment to fuel its product development. The company is also recruiting hardware and software engineers, aiming to double its team across its offices in Bristol and Cambridge. VyperCore’s first product, a single-core RISC-V processor named Akurra, is currently running on an FPGA. The startup plans to release a single-core test chip next year, followed by a multicore commercial server chip and an accelerator card.
Haggar emphasizes that VyperCore’s technology can be embedded in a variety of processors, but the initial focus is on accelerating data center applications. “We are targeting a server-class 64-bit RISC-V quad-core processor, probably in N5 [5nm] and server card hardware,” he explained. This production is targeted for the end of 2026.
